The present invention relates to a battery charger circuit for charging one or more batteries. In particular, the present invention relates to a voltage mode battery charger that uses both current and voltage control to regulate the charging cycle and to provide accurate charging and charge termination.
In one aspect, the present invention provides a circuit for adjusting the duty cycle of a PWM signal. The circuit includes a battery current control section that generates a current control signal proportional to an amount battery charging current exceeds a predetermined battery charging current threshold. The circuit also includes a battery voltage control section that generates a voltage control signal proportional to an amount a battery voltage exceeds a predetermined battery voltage threshold. A compensation capacitor and a current source charging the compensation capacitor are also provided. A comparator generates a PWM signal based on the amplitude of the voltage on the compensation capacitor. The current source and the current control signal and voltage control signal are summed together at a common node, so that the current control signal and/or said voltage control signal reduce the voltage on the compensation capacitor thereby reducing the duty cycle of the PWM signal.
In another aspect, the present invention provides a battery charging circuit that includes a current control circuit generating a current control signal proportional to the amount battery charging current exceeds a predetermined battery charging current threshold; a voltage control circuit generating a voltage control signal to the amount battery voltage exceeds a predetermined battery voltage threshold; a DC/DC converter circuit generating the battery charging current from a DC source; and a PWM signal generator circuit generating a PWM signal for controlling the duty cycle of the DC/DC converter circuit. The PWM circuit comprises a comparator, an oscillator, a compensation capacitor and a current source charging the compensation capacitor. The comparator generates the PWM signal based on the voltage on the compensation capacitor. The current source and the current control signal and voltage control signal are summed together at a common node so that the current control signal and/or the voltage control signal reduce the voltage on the compensation capacitor thereby reducing the duty cycle of the PWM signal and thereby reducing the current delivered by the DC/DC converter circuit.
It will be appreciated by those skilled in the art that although the following Detailed Description will proceed with reference being made to preferred embodiments and methods of use, the present invention is not intended to be limited to these preferred embodiments and methods of use. Rather, the present invention is of broad scope and is intended to be limited as only set forth in the accompanying claims.